目前產品有使用Ethernet Switch DM8806,了解一下datasheet
更新記錄
item | note |
---|---|
20160624 | 第一版 |
目錄
DM8806
DAVICOM
- 聯傑國際(DAVICOM Semiconductor, Inc.)成立於1996年,由聯華電子網路通訊團隊與美國網通專家所組成
- 嵌入式高速乙太網路通訊晶片系列
- Embedded Ethernet Controller
- NIC/ Non-PCI
- DM9000
- 32-bit 10/100M Ethernet controller with processor interface.
- DM9000A
- 16-bit 10/100M Ethernet controller with processor interface.
- Switch/ MII
- DM8806
- 6-Port Fast Ethernet Switch Controller.
- Supports 5TP & MII,RMII,IEEE802.3az,
DM8806
- 來源-mdio rgmii mac phy简单了解
- 对于MII接口,IEEE 802.3标准描述PHY用于向MAC提供TX和RX时钟
- 在MAC到MAC应用中,这将意味着需要使用外部电路来产生这些时钟
- 卓联公司通过使交换机的MAC产生这些时钟,解决了这一问题,消除了对附加电路的需要
- 该接口称为Reverse MII(RvMII)
reverse MII is the name for a reverse loop of data,來源-What is Reverse MII in Ethernet interface
dm8806 block
- Network Interface / Pin Define
pin | type | note |
---|---|---|
P0_TX -/+ | I/O | Port 0 TP TX |
P0_RX -/+ | I/O | Port 0 TP RX |
P1_TX -/+ | I/O | Port 1 TP TX |
P1_RX -/+ | I/O | Port 1 TP RX |
P2_TX -/+ | I/O | Port 2 TP TX |
P2_RX -/+ | I/O | Port 2 TP RX |
P3_TX -/+ | I/O | Port 3 TP TX |
P3_RX -/+ | I/O | Port 3 TP RX |
BEGRES | I/O | Bandgap pin |
VCNTL | I/O | 1.8V |
VRET | O | Voltage Reference |
- Port4 MAC MII Pins
pin | type | note |
---|---|---|
P4M_TXD3,2,1,0 | O | Transmit Data (bit 3-0) |
P4M_TXE | O | Transmit Enable |
P4M_TXC | I | Trasmit Clock |
P4M_CRS | I | Carrier Sense |
P4M_COL | I | Collision Detect |
P4M_RXC | I | Receive Clock |
P4M_RXDV | I | Receive Data Valid |
P4M_RXD3,2,10 | I | Receive Data (bit 3-0) |
Port4 MAC Reverse (RevMII)
MII本來傳送輸要MAC輸出TXC(Clock),RevMII則不需要由MAC來提供Clock
pin | type | note |
---|---|---|
P4M_TXD3,2,1,0 | O | Transmit Data (bit 3-0) |
P4M_TXE | O | Transmit Enable |
P4M_TXC | O | Trasmit Clock |
P4M_CRS | O | Carrier Sense |
P4M_COL | O | Collision Detect |
P4M_RXC | I | Receive Clock |
P4M_RXDV | I | Receive Data Valid |
P4M_RXD3,2,10 | I | Receive Data (bit 3-0) |
- Port4 MAC Reduce MII (RMII) Pins
pin | type | note |
---|---|---|
P4M_TXD1,0 | O | Transmit Data |
P4M_TXE | O | Transmit Enable |
P4M_REFCLK_O | O | Reference Clock 50Mhz Output |
P4M_REFCLK_I | I | Receive Clock 50MHz Input |
P4M_CRSDV | I | Receive Data Valid |
P4M_RXD1,0 | I | Receive Data |
MII共需要14條訊息號線, RMII少了txd3-2,rxd3-2,P4M_CRS,P4M_COL共少了6條訊號線-
MII /RMII
MDI-II / MDI-X
- 自動分辨網路線跳線或平行線 (Auto MDI/MDIX),來源- 基礎網路概念]
- MDI (for medium dependent interface),
- media attachment unit (MAU)
- The MDI is the componet of the MAU that provides the physical and electrical connection to the cabling medium
- 即為一般的網路線(pin1-8 是對接到 pin1-8),用來連接PC及switch
- MDIX
- An MDIX (for MDI crossover) is a version of MDI that enables connection between like devices
- 即為網路線跳線