stm32f0-timer

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STM32F0 timer interrupt 說明/範例

更新記錄

item note
20171125 第一版

目錄

Timer Interrupt 範例說明

使用STM32CubeMX產生TIM3時間中斷500ms
於TIM3中斷ISR中設定GPIO更新

STM32CubeMx

  • <1> CubeMX設定 TIM3 Clock Source為Internal Clock

    [CubeMx]

  • <2> 設定TIM3參數值
    Prescaler設定47999(即會數48000次)，48MHz則為1MHz，將會產生1ms會計數一次Counter
    Counter period設定為499(即會數到500次)，因此時間為500ms產生一次中斷

    [CubeMx] [CubeMx]

  • <3>開啟TIM3時間中斷Enable
    此時程式會於stm32f0xx_hal_msp.c中HAL_TIM_Base_MspInit功能裡面，加入HAL_NVIC_EnableIRQ(TIM3_IRQn)

    [CubeMx]

  • <4>增加main.c內容如下
    注意使用功能為HAL_TIM_Base_Start_IT()，非HAL_TIM_Base_Start()
    HAL_TIM_Base_Start_IT: 會開啟TIM中斷開關及啟動timer
    HAL_TIM_Base_Start：只會啟動timer

    [CubeMx] [CubeMx]

其它說明

register

CEN設定為1，此時timer開始算計
當overflow或underflow將會產生UIF訊號
需要把UIE訊號enable，此時才會產生中斷

[TIM TypeDef] [TIM register]

callback

TIM3_IRQHandler預設TIM3中斷ISR
在ISR會執行HAL_TIM_IRQHandler

  • HAL_TIM_IRQHandler

    1
    2
    /* TIM Update event */
    HAL_TIM_PeriodElapsedCallback

  • TIM3_IRQHandler

    1
    HAL_TIM_IRQHandler
[CubeMx]

STM32F0 Timer 說明

  • STM32F051x提供下例timer
    6個通用型(TIM2,3,14,15,16,17)
    1個basic timer(TIM6)
    1個advanced control timer(TIM6)

Advanced-control timer(TIM1)
General-purpose timers(TIM2,3,14,15,16,17)

[Clock Tree] [Timer Feature]

TIM1

[advanced-control-timer-block]

  • TIM1
    input capture
    output compare
    PWM generation(TIMx_CH1/TIMx_CH1N)
    one-pulse mode outpupt

  • 當TIMx_CNT產生overflow或underflow時會產生update event(UEV)

  • The time-base unit includes
    Counter register(TIMx_CNT)
    Prescaler register(TIMx_PSC)
    Auto-reload register(TIMx_APR)
    Repetition counter register(TIMx_RCR)

TIM2/TIM3

[TIM2 TIM3]

TIM14

[TIM14]

TIM15

[TIM14]

TIM16/TIM17

[tim16_tim17]

Timer Counter Modes 說明

  • Upcounting mode

    [upcounting-mode]

  • Downcounting mode

    [downcounting-mdoe]

  • Center-aligned mode(up/down counting)

    [up/down counting]

  • Repetition counter

    [Repetition counter]

  • Repetition counter
    控制產生UEV(update event)訊號方式
    當repetition counter為零且狀態為overflow/underflow時，將會產生UEV

  • The repetition counter is decrememnted
    At each counter overflow in upcounting mode
    At each counter undeflow in downcounting mode
    At each counter overflow and at each counter underflow in center-aligned mode.

Timer Clock Source 說明

  • counter clock source來源有下例輸入
    Inter clock(CK_INT)
    External clock mode1: external input pin
    External clock mode2: external trigger input ETR
    Internal trigger inputs(ITRx)

參考來源