stm32f0xx-gpio

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STM32F0 GPIO說明/範例

更新記錄

item note
20171123 第一版

目錄

STM32F0 GPIO

  • I/O在reset之後預設為I/O port且設定為input floating mode
    因此若要使用其它功能timer,capture,pwm等即需要設定alternate functions

  • reset之後I/O ports預設為input floating mode
    除了
    PA14: SWCLK in pull-down
    PA13: SWDIO in pull-up

  • GPIO設定
    I/O設定為OUTPUT, 輸出值需寫到output data register(GPIOx_IDR)
    I/O設定為INPUT,輸入值存在input data register(GPIOx_IDR)
    在每個AHB clock cycle變更GPIOx_IDR數值
    由GPIOx_PUPDR來定設weak internal pull-up/pull-down

Basic structure of an I/O port bit
[Basic structure of an I/O port bit]

Port bit configuration table
[Port bit configuration table]

[Port x configuration bits]

提供設定暫器

  • four 32-bit configuration registers
    GPIO_x_MODER
    GPIO_x_OTYPER
    GPIOx_OSPEEDR
    GPIOx_PUPDR

  • 32-bit data registers
    GPIOx_IDR
    GPIOx_ODR

  • 32-bit set/reset register
    GPIOx_BSRR

  • Ports A and B also have a 32-bit locking register
    GPIOx_LCKR

  • 32-bit alternate function selection registers
    GPIOx_AFRH
    GPIOx_AFRL

GPIO提供功能

  • Output states: push-pull or open drain + pull-up/down
    Output data from output data register (GPIOx_ODR) or peripheral (alternate function output)

  • Input states: floating, pull-up/down, analog
    Input data to input data register (GPIOx_IDR) or peripheral (alternate function input)

  • GPIOx_ BSRR for bitwise write access to GPIOx_ODR
    When written to 1, bit BS(i) sets the corresponding ODR(i) bit.
    When written to 1, bit BR(i) resets the ODR(i) corresponding bit.

  • GPIOx_LCKR provided to freeze the port A or B I/O port configuration

  • Speed selection for each I/O

software define

文件[RM0091-Reference-manual]
2.2.2 Memory map and register boundary addresses

[ define] [ define]

GPIOx_BRR: port bit reset register
GPIOx_BSRR: port bit set/reset register
BRy寫入1則reset the corresponding ODRx bit (ODRx bit被清除為0)
BSy寫入1則sets the corresponding ODRx bin (ODRx bit被設定為1)
GPIOx_ODR: port output data register
介由GPIOx_BSRR/GPIOx_BRR來設定
GPIOx_IDR: port input data register

[ register ] [ register ]

example code

不按輸入為0，按了輸為1，此時LED動作
[ USER Button]

[ example code]

來源：STM32F0 GPIO: Blinking LED with CubeMX, Keil ARM and Source Insight - Tutorial 2

HAL_GPIO_Init

[ GPIO Init]

<1>設定Clock

system reset之後預設i/o clock為disable
因此需要開啟i/o clock
HAL_RCC_GPIOA_CLK_ENABLE: 設定RCC->AHBENR，開啟PORTA Clock

  • 電路中用到GPIO
    PA0: USER Button,PC9/PC8: LED3/LED4
    因此需要開啟PORTA,PORTC的Clock
[ RCC AHBENR ]

<2>設定port輸出為low(即LED沒打亮)

HAL_GPIO_WritePin(GPIOC, LD4_Pin|LD3_Pin, GPIO_PIN_RESET);

  • 設定輸入腳位User Botton為 GPIO_MODE_EVT_RISING
[ GPIO Mode]

<3>HAL_GPIO_Init

[ HAL GPIO Init ]

先設定好GPIO_InitTypeDef格式內容
呼叫HAL_GPIO_Init()將會設定相關的硬体

[ GPIO PIN ]

GPIO_InitTypeDef說明

type note
Pin GPIO_PIN_0 ~ GPIO_PIN_15,使用OR達到同時設定多腳位
Mode EX. GPIO_MODE_OUTPUT_PP, 提供12種設定方式
Pull 是否設定GPIO提供上拉/下拉電阻
Speed 設定輸出最大頻率：LOW(2MHz)/ MEDIUM(4M-10MHz)/ HIGH(10MHz-50MHz)
Alternate

HAL_GPIO_Init 程序

依照GPIOx的PIN腳設定下例

  • 若為 GPIO_MODE_AF_PP || GPIO_MODE_AF_OD => 設定GPIOx->AFR
  • 若為 GPIO_MODE_{ OUTPUT_PP || OUTPUT_OD || AF_PP || AF_OD }
    • 設定 GPIOx->OSPEEDR (預設為GPIO_SPEED_FREQ_LOW)
    • 設定 GPIOx->OTYPER
  • 設定 GPIOx->PUPDR
  • 若為 EXIT_MODE
    • HAL_RCC_SYSCFG_CLK_ENABLE
    • 設定 SYSCFG->EXTICR
    • 設定 EXTI->IMR(interrup mask register)
    • 設定 EXTI->EMR(Event mask register)
    • 設定 EXTI->RTST(Rising trigger select register)
    • 設定 EXTI->FTSR(Falling trigger select register)

External interrupt selection code example

[ interrupt example ]

STM32F05X 功能說明

GPIO Alternate Function

[ Alternate Function ]

I/O port若設定為alternate function(AF0-AF7)提供下例功能

  • 輸出可以設定為AF_PP(push-pull mode)或AF_OD(open-drain)
  • output buffer是由週邊裝置驅動
  • schmitt trigger input is activated
  • input data register every AHB clock cycle更新
  • A read access to the input data register get the I/O state

SYSCFG

System configuration controller(SYSCFG)
提供下例功能

  • Remapping some DMA trigger source to different DMA channels
  • Pending interrupt status register
  • Managing the external interrupt line connection to the GPIOs
    若有使用External功能，在HAL_GPIO_Init會設定SYSCFG

Extended interrupts and events controller

Extended interrupts and events controller(EXTI)

  • EXTI管理外部及內部事件及中斷，產生事件需求給CPU
  • 提供23個外部事件
  • 提供9個內部事件
  • Independent mask on each event/interrupt line
[ EXTI ]

SYSCFG EXTICR

SYSCFG external interrupt configuration register(SYSCFG_EXTICR)

設定I/O為外部中斷(EXT0-EXT15)
EXTI0為PIN0外部中斷產生訊號，設定:選擇PA/PB/PC那一個
EXTI1為PIN1外部中斷產生訊號，設定:選擇PA/PB/PC那一個

[ SYSCFG EXTICR ] [ EXTICR ]

設定完成SYSCFG之後就是設定(EXTI->IMR, EXTI->EMR, EXTI->RTST, EXTI->FTSR)

[ register ]

Reset and clock control (RCC)

三種reset定義

  • system reset
    有下例清況會產生system reset
    • NRST pin(exteranl reset)
    • Window watchdog event(WWDG reset)
    • Independent watchdog event (IWDG reset)
    • A software reset(SW reset)
    • Low-power management reset
    • Option byte loader reset
    • power reset
  • power reset
    有下例情況會產生power reset
    • 當產生POR/PDR reset訊號
    • 離開Standby mode
  • RTC domain reset
[ EXTI ]

Clocks

由下例來源產生系統時脈(SYSCLK)

  • HSI 8MHz RC oscillator clock
  • HSE oscillator clock
  • PLL clock
[ Clock Tree ]

AHB週邊時脈來源HCLK
APB週邊時脈來源PCLK
AHB/APB domain max frequency is 48MHz

STM32F0x1 Power

STM32F0x1 device requires a 2.0V-3.6V operating supply voltage
and a 2.0V-3.6V analog supply voltage(VDDA)

當VDD電源關閉時(或檢測到Low voltage detector)
RTC(real-time clock)及backup register 由VBAT供電

[ EXTI ]

參考